From e22d6bebbcd1d80f302c064cf15abfc769a53668 Mon Sep 17 00:00:00 2001 From: shangyatsen <429839446@qq.com> Date: Mon, 11 Mar 2024 00:14:58 +0800 Subject: [PATCH] LOONGARCH64: BACKPORT: FROMEXT: loongarch debug Signed-off-by: shangyatsen <429839446@qq.com> Link: https://github.com/FanFansfan/loongson-linux/commit/22c55ab3931c32410a077b3ddb6dca3f28223360 [Kexy: Resolved minor conflicts in drivers/gpu/drm/xe/xe_bo.c, drivers/gpu/drm/xe/xe_guc_ads.c, drivers/gpu/drm/xe/xe_guc_ct.c, drivers/gpu/drm/xe/xe_guc_pc.c, drivers/gpu/drm/xe/xe_pt.c, drivers/gpu/drm/xe/xe_res_cursor.h, and drivers/gpu/drm/xe/xe_vm.c] Signed-off-by: Kexy Biscuit --- drivers/gpu/drm/xe/regs/xe_engine_regs.h | 3 +-- drivers/gpu/drm/xe/xe_bo.c | 15 ++++++++------- drivers/gpu/drm/xe/xe_ggtt.c | 2 +- drivers/gpu/drm/xe/xe_guc.c | 4 ++-- drivers/gpu/drm/xe/xe_guc_ads.c | 18 +++++++++--------- drivers/gpu/drm/xe/xe_guc_ct.c | 2 +- drivers/gpu/drm/xe/xe_guc_log.c | 2 +- drivers/gpu/drm/xe/xe_guc_pc.c | 4 ++-- drivers/gpu/drm/xe/xe_migrate.c | 6 +++--- drivers/gpu/drm/xe/xe_query.c | 2 +- drivers/gpu/drm/xe/xe_vm.c | 7 +++++-- 11 files changed, 34 insertions(+), 31 deletions(-) diff -uNra a/drivers/gpu/drm/xe/regs/xe_engine_regs.h b/drivers/gpu/drm/xe/regs/xe_engine_regs.h --- a/drivers/gpu/drm/xe/regs/xe_engine_regs.h 2025-07-14 22:02:59.000000000 +0800 +++ b/drivers/gpu/drm/xe/regs/xe_engine_regs.h 2025-07-29 17:59:35.928445670 +0800 @@ -52,7 +52,7 @@ #define RING_START(base) XE_REG((base) + 0x38) #define RING_CTL(base) XE_REG((base) + 0x3c) -#define RING_CTL_SIZE(size) ((size) - PAGE_SIZE) /* in bytes -> pages */ +#define RING_CTL_SIZE(size) ((size) - XE_PAGE_SIZE) /* in bytes -> pages */ #define RING_START_UDW(base) XE_REG((base) + 0x48) diff -uNra a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c --- a/drivers/gpu/drm/xe/xe_bo.c 2025-07-14 22:02:59.000000000 +0800 +++ b/drivers/gpu/drm/xe/xe_bo.c 2025-07-29 17:59:35.928445670 +0800 @@ -1300,7 +1300,7 @@ }; struct ttm_placement *placement; uint32_t alignment; - size_t aligned_size; + size_t aligned_size = size; int err; /* Only kernel objects should set GT */ @@ -1327,13 +1327,13 @@ flags |= XE_BO_FLAG_INTERNAL_64K; alignment = align >> PAGE_SHIFT; } else { - aligned_size = ALIGN(size, SZ_4K); + aligned_size = ALIGN(size, PAGE_SIZE); flags &= ~XE_BO_FLAG_INTERNAL_64K; - alignment = SZ_4K >> PAGE_SHIFT; + alignment = PAGE_SIZE >> PAGE_SHIFT; } - if (type == ttm_bo_type_device && aligned_size != size) - return ERR_PTR(-EINVAL); + // if (type == ttm_bo_type_device && aligned_size != size) + // return ERR_PTR(-EINVAL); if (!bo) { bo = xe_bo_alloc(); @@ -1343,7 +1343,8 @@ bo->ccs_cleared = false; bo->tile = tile; - bo->size = size; + //bo->size = size; + bo->size = aligned_size; bo->flags = flags; bo->cpu_caching = cpu_caching; bo->ttm.base.funcs = &xe_gem_object_funcs; @@ -1354,7 +1355,7 @@ #endif INIT_LIST_HEAD(&bo->vram_userfault_link); - drm_gem_private_object_init(&xe->drm, &bo->ttm.base, size); + drm_gem_private_object_init(&xe->drm, &bo->ttm.base, aligned_size); if (resv) { ctx.allow_res_evict = !(flags & XE_BO_FLAG_NO_RESV_EVICT); diff -uNra a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c --- a/drivers/gpu/drm/xe/xe_ggtt.c 2025-07-14 22:02:59.000000000 +0800 +++ b/drivers/gpu/drm/xe/xe_ggtt.c 2025-07-29 17:59:35.932445670 +0800 @@ -68,7 +68,7 @@ { u64 pte; - pte = xe_bo_addr(bo, bo_offset, XE_PAGE_SIZE); + pte = xe_bo_addr(bo, bo_offset, XE_PAGE_SIZE) & ~XE_PTE_MASK; pte |= XE_PAGE_PRESENT; if (xe_bo_is_vram(bo) || xe_bo_is_stolen_devmem(bo)) diff -uNra a/drivers/gpu/drm/xe/xe_guc_ads.c b/drivers/gpu/drm/xe/xe_guc_ads.c --- a/drivers/gpu/drm/xe/xe_guc_ads.c 2025-07-14 22:02:59.000000000 +0800 +++ b/drivers/gpu/drm/xe/xe_guc_ads.c 2025-07-29 18:00:23.460445670 +0800 @@ -139,7 +139,7 @@ static size_t guc_ads_golden_lrc_size(struct xe_guc_ads *ads) { - return PAGE_ALIGN(ads->golden_lrc_size); + return ALIGN(ads->golden_lrc_size, XE_PAGE_SIZE); } static u32 guc_ads_waklv_size(struct xe_guc_ads *ads) @@ -165,7 +164,7 @@ static size_t guc_ads_private_data_size(struct xe_guc_ads *ads) { - return PAGE_ALIGN(ads_to_guc(ads)->fw.private_data_size); + return ALIGN(ads_to_guc(ads)->fw.private_data_size, XE_PAGE_SIZE); } static size_t guc_ads_regset_offset(struct xe_guc_ads *ads) @@ -180,7 +179,7 @@ offset = guc_ads_regset_offset(ads) + guc_ads_regset_size(ads); - return PAGE_ALIGN(offset); + return ALIGN(offset, XE_PAGE_SIZE); } static size_t guc_ads_waklv_offset(struct xe_guc_ads *ads) @@ -200,7 +199,7 @@ offset = guc_ads_waklv_offset(ads) + guc_ads_waklv_size(ads); - return PAGE_ALIGN(offset); + return ALIGN(offset, XE_PAGE_SIZE); } static size_t guc_ads_um_queues_offset(struct xe_guc_ads *ads) @@ -210,7 +209,7 @@ offset = guc_ads_capture_offset(ads) + guc_ads_capture_size(ads); - return PAGE_ALIGN(offset); + return ALIGN(offset, XE_PAGE_SIZE); } static size_t guc_ads_private_data_offset(struct xe_guc_ads *ads) @@ -220,7 +219,7 @@ offset = guc_ads_um_queues_offset(ads) + guc_ads_um_queues_size(ads); - return PAGE_ALIGN(offset); + return ALIGN(offset, XE_PAGE_SIZE); } static size_t guc_ads_size(struct xe_guc_ads *ads) @@ -278,7 +277,7 @@ continue; real_size = xe_gt_lrc_size(gt, class); - alloc_size = PAGE_ALIGN(real_size); + alloc_size = ALIGN(real_size, XE_PAGE_SIZE); // 这里究竟如何对齐 total_size += alloc_size; } @@ -813,7 +812,7 @@ xe_gt_assert(gt, gt->default_lrc[class]); real_size = xe_gt_lrc_size(gt, class); - alloc_size = PAGE_ALIGN(real_size); + alloc_size = ALIGN(real_size, XE_PAGE_SIZE); // 这里究竟如何对齐 total_size += alloc_size; xe_map_memcpy_to(xe, ads_to_map(ads), offset, diff -uNra a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c --- a/drivers/gpu/drm/xe/xe_guc.c 2025-07-14 22:02:59.000000000 +0800 +++ b/drivers/gpu/drm/xe/xe_guc.c 2025-07-29 17:59:35.932445670 +0800 @@ -78,7 +78,7 @@ static u32 guc_ctl_log_params_flags(struct xe_guc *guc) { - u32 offset = guc_bo_ggtt_addr(guc, guc->log.bo) >> PAGE_SHIFT; + u32 offset = guc_bo_ggtt_addr(guc, guc->log.bo) >> XE_PTE_SHIFT; u32 flags; #if (((CRASH_BUFFER_SIZE) % SZ_1M) == 0) @@ -131,7 +131,7 @@ static u32 guc_ctl_ads_flags(struct xe_guc *guc) { - u32 ads = guc_bo_ggtt_addr(guc, guc->ads.bo) >> PAGE_SHIFT; + u32 ads = guc_bo_ggtt_addr(guc, guc->ads.bo) >> XE_PTE_SHIFT; u32 flags = ads << GUC_ADS_ADDR_SHIFT; return flags; diff -uNra a/drivers/gpu/drm/xe/xe_guc_ct.c b/drivers/gpu/drm/xe/xe_guc_ct.c --- a/drivers/gpu/drm/xe/xe_guc_ct.c 2025-07-14 22:02:59.000000000 +0800 +++ b/drivers/gpu/drm/xe/xe_guc_ct.c 2025-07-29 17:59:35.932445670 +0800 @@ -211,7 +211,7 @@ struct xe_bo *bo; int err; - xe_gt_assert(gt, !(guc_ct_size() % PAGE_SIZE)); + xe_gt_assert(gt, !(guc_ct_size() % XE_PAGE_SIZE)); ct->g2h_wq = alloc_ordered_workqueue("xe-g2h-wq", 0); if (!ct->g2h_wq) diff -uNra a/drivers/gpu/drm/xe/xe_guc_log.c b/drivers/gpu/drm/xe/xe_guc_log.c --- a/drivers/gpu/drm/xe/xe_guc_log.c 2025-07-14 22:02:59.000000000 +0800 +++ b/drivers/gpu/drm/xe/xe_guc_log.c 2025-07-29 17:59:35.932445670 +0800 @@ -48,7 +48,7 @@ * | Capture logs | * +===============================+ + CAPTURE_SIZE */ - return PAGE_SIZE + CRASH_BUFFER_SIZE + DEBUG_BUFFER_SIZE + + return XE_PAGE_SIZE + CRASH_BUFFER_SIZE + DEBUG_BUFFER_SIZE + CAPTURE_BUFFER_SIZE; } diff -uNra a/drivers/gpu/drm/xe/xe_guc_pc.c b/drivers/gpu/drm/xe/xe_guc_pc.c --- a/drivers/gpu/drm/xe/xe_guc_pc.c 2025-07-14 22:02:59.000000000 +0800 +++ b/drivers/gpu/drm/xe/xe_guc_pc.c 2025-07-29 18:01:26.788445670 +0800 @@ -1099,7 +1099,7 @@ { struct xe_device *xe = pc_to_xe(pc); struct xe_gt *gt = pc_to_gt(pc); - u32 size = PAGE_ALIGN(sizeof(struct slpc_shared_data)); + u32 size = ALIGN(sizeof(struct slpc_shared_data), XE_PAGE_SIZE); int ret; xe_gt_assert(gt, xe_device_uc_enabled(xe)); @@ -1205,7 +1205,7 @@ struct xe_tile *tile = gt_to_tile(gt); struct xe_device *xe = gt_to_xe(gt); struct xe_bo *bo; - u32 size = PAGE_ALIGN(sizeof(struct slpc_shared_data)); + u32 size = ALIGN(sizeof(struct slpc_shared_data), XE_PAGE_SIZE); int err; if (xe->info.skip_guc_pc) diff -uNra a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c --- a/drivers/gpu/drm/xe/xe_migrate.c 2025-07-14 22:02:59.000000000 +0800 +++ b/drivers/gpu/drm/xe/xe_migrate.c 2025-07-29 17:59:35.932445670 +0800 @@ -593,7 +593,7 @@ u64 addr, flags = 0; bool devmem = false; - addr = xe_res_dma(cur) & PAGE_MASK; + addr = xe_res_dma(cur) & ~XE_PTE_MASK; if (is_vram) { if (vm->flags & XE_VM_FLAG_64K) { u64 va = cur_ofs * XE_PAGE_SIZE / 8; @@ -614,7 +614,7 @@ bb->cs[bb->len++] = lower_32_bits(addr); bb->cs[bb->len++] = upper_32_bits(addr); - xe_res_next(cur, min_t(u32, size, PAGE_SIZE)); + xe_res_next(cur, min_t(u32, size, XE_PAGE_SIZE)); cur_ofs += 8; } } @@ -803,7 +803,7 @@ if (copy_system_ccs) xe_res_first_sg(xe_bo_sg(src_bo), xe_bo_ccs_pages_start(src_bo), - PAGE_ALIGN(xe_device_ccs_bytes(xe, size)), + PAGE_ALIGN(xe_device_ccs_bytes(xe, size)), // 这里的对齐？ &ccs_it); while (size) { diff -uNra a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c --- a/drivers/gpu/drm/xe/xe_query.c 2025-07-14 22:02:59.000000000 +0800 +++ b/drivers/gpu/drm/xe/xe_query.c 2025-07-29 17:59:35.932445670 +0800 @@ -344,7 +344,7 @@ config->info[DRM_XE_QUERY_CONFIG_FLAGS] = DRM_XE_QUERY_CONFIG_FLAG_HAS_VRAM; config->info[DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT] = - xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? SZ_64K : SZ_4K; + xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? SZ_64K : PAGE_SIZE; config->info[DRM_XE_QUERY_CONFIG_VA_BITS] = xe->info.va_bits; config->info[DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY] = xe_exec_queue_device_get_max_priority(xe); diff -uNra a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c --- a/drivers/gpu/drm/xe/xe_vm.c 2025-07-14 22:02:59.000000000 +0800 +++ b/drivers/gpu/drm/xe/xe_vm.c 2025-07-29 17:59:35.932445670 +0800 @@ -19,6 +19,7 @@ #include #include #include +#include #include @@ -1309,7 +1310,7 @@ { u64 pde; - pde = xe_bo_addr(bo, bo_offset, XE_PAGE_SIZE); + pde = xe_bo_addr(bo, bo_offset, XE_PAGE_SIZE) & ~XE_PTE_MASK; pde |= XE_PAGE_PRESENT | XE_PAGE_RW; pde |= pde_encode_pat_index(pat_index); @@ -1321,7 +1322,7 @@ { u64 pte; - pte = xe_bo_addr(bo, bo_offset, XE_PAGE_SIZE); + pte = xe_bo_addr(bo, bo_offset, XE_PAGE_SIZE) & ~XE_PTE_MASK; pte |= XE_PAGE_PRESENT | XE_PAGE_RW; pte |= pte_encode_pat_index(pat_index, pt_level); pte |= pte_encode_ps(pt_level); @@ -1335,6 +1336,8 @@ static u64 xelp_pte_encode_vma(u64 pte, struct xe_vma *vma, u16 pat_index, u32 pt_level) { + pte &= ~XE_PTE_MASK; + pte |= XE_PAGE_PRESENT; if (likely(!xe_vma_read_only(vma)))